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CHAPTER 24 - MISCELLANEOUS INSTRUCTIONS
There are a few more assembler instructions which have not been
covered. Some are seldom used and some are used in special
circumstances. This chapter gives a brief explanation of them.
XCHG
XCHG, the exchange instruction, switches the contents of two
registers or of a register and a memory location.
xchg ax, bx
xchg al, dl
xchg variable1, si
xchg ch, variable2
xchg [si], ax
xchg bh, [di]
It operates on either a word or a byte. It cannot switch two
memory locations, and it does not operate on the segment
registers, only on the 8 arithmetic registers.
ESC
The escape instruction is not a complete instruction, it is the
beginning of an instruction. It signals the 8086 that the first
two bytes of the instruction contain a co-processor instruction.
The 8087 is a mathematics co-processor. It reads the instructions
at the same time as the 8086, and when it sees an escape
instruction meant for it, it performs that operation. The 8086
does nothing unless there is a memory address involved. In that
case the 8086 calculates the address and gives the address to the
8087.
fld DWORD PTR [si]
fmul st, st(3)
fisub WORD PTR [di]
are all 8087 instructions that the assembler codes with the
escape code. You will never code the escape instruction yourself.
WAIT (FWAIT)
The 8087 operates independently of the 8086. They can both
perform operations at the same time, but it is possible for them
to interfere with each other. If both the 8086 and 8087 are
reading from or writing to memory, or if one is reading from
while the other is writing to memory, the read/write will be
corrupted. In order to stop this, whenever you access memory with
the 8087, you need to put in a WAIT instruction. WAIT (or FWAIT
______________________
The PC Assembler Tutor - Copyright (C) 1989 Chuck Nelson
Chapter 24 - Miscellaneous Instructions 265
_______________________________________
which is the same thing), suspends operation of the 8086 until
the co-processor is finished. It would look like this:
fstp DWORD PTR [bx]
fwait
The 8086 will wait until the 8087 is finished storing into
memory.
There must also be a wait between 8087 instructions. This is to
keep the 8087 from starting a second instruction before it is
finished with the first one. The instruction execution is done by
the 8087, but the timing is done by the 8086. If you had the
folllowing code:
fmul st, st(3)
fadd st, st(2)
fsub st, st(4)
the 8086 would be past the third instruction before the 8087 had
time to finish doing the first instruction. The proper coding is:
fmul st, st(3)
fwait
fadd st, st(2)
fwait
fsub st, st(4)
This should concern you only if you program the 8087. It is
outside the realm of this book. Remember, WAIT and FWAIT are the
same instruction.
LOCK
LOCK is not really of concern to a PC programmer. On some systems
it is possible to have more than one 8086 that has access to the
same memory. The problem then arises as it did with the 8087 that
there is the possibility of two 8086s doing read/write operations
to memory at the same time. This will result in corrupted data.
LOCK allows an 8086 to lock out other 8086s. It will be the only
one allowed to read to or write to memory during the next
instruction. This is mostly of concern to people who write code
for peripheral devices which have DMA (direct memory access).
LOOPE/LOOPZ LOOPNE/LOOPNZ
We have used the loop instruction, but these are special cases.
Remember, the general loop instruction decrements CX by 1, and if
the result is not zero, it jumps to the top of the loop. In
special circumstances, you not only want to check the counter in
CX, but you also want to check the result of some other
operation.
test ax, 5
loope outer_loop
The PC Assembler Tutor 266
______________________
will loop if cx is not zero AND ax = 5
test ax, 5
loopne outer_loop
will loop if cx is not zero AND ax is not 5.
HALT
HALT actually halts the operation of the 8086. It can only be
started again by a reset or an interrupt. If you write:
cli ; clear interrupt flag
halt
Then normal interrupts can't happen and you have effectively shut
down the system. One place this might be of use is if you have a
copy protection scheme and you detect that someone has violated
it. It halts the system and you need to reset to start again.
Another place might be if you are writing a game - someone
inadvertently enters the "Dungeon of Darkness" and you shut the
system down.
CMC
CMC (complement the carry flag) toggles the carry flag. If it is
off this turns it on, and if it is on, this turns it off. Why
this instruction exists is a complete mystery to me. Why would
you want it as part of the instruction set?
LAHF
LAHF (load AH from flags) stores half of the flags in AH. The
register looks like this:
7 6 5 4 3 2 1 0
S Z A P C
Where these are the Sign, Zero, Auxillary, Parity and Carry
flags. This is a leftover from earlier Intel chips. All these
flags are testable so you dont need to look at them, and if you
want to save them, then:
pushf
does the trick. Notice that AH does not contain DF, the direction
flag or IEF, the interrupt enable flag, which are things you
CAN'T test with a jump instruction. To test for them you need to:
pushf
pop ax
Then AX contains all the flags.
Chapter 24 - Miscellaneous Instructions 267
_______________________________________
SAHF
SAHF (store AH to flags) is the counterpart to the above
instruction. It puts AH into the low half of the flags register.
The comments about LAHF apply to this instruction also.
NOP
And finally, NOP does absolutely nothing. It is there in case you
need to fill space, either because you have taken out an
instruction or for reasons of alignment. It also allows a
debugger to put the single byte INT (int 3) in the code and then
replace it with NOP when the breakpoint is no longer desired.